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Monday, March 21, 2016

Atheros chipset overview

Hardware Overview

The Atheros 802.11 NIC is, at it's core, a DMA engine with hardware timers implementing the 802.11 packet timing. The hardware handles doing the OFDM/CCK RF encoding and decoding.

General Overview

The NIC can be broken down into a few larger blocks:
  • The MAC - implements the 802.11 packet timing, encryption/decryption, packet scheduling, DMA and queuing
  • The PHY - implements the 802.11 packet encoding and decoding.
  • The radio (analog) - implements the 2.4GHz / 5GHz radio.
  • Power control / RTC - handling turning on and off power and clock generation to various parts of the device
  • Host interface - the glue between the internal AHB and whatever the host supports - PCI, PCIe, etc

MAC

The MAC side is further broken down into:
  • PCU - packet control unit. This handles handles packet reception.
  • QCU - queue control unit. This handles packet transmission DMA.
  • DCU - (?) control unit. This handles the 802.11 side of packet transmission - contention window management, QoS settings, etc.
  • FIFOs - there's a TX and an RX FIFO.
The MAC itself implements (not an exhaustive list!):
  • contention window and backoff timers
  • RTS generation, CTS-to-self generation, CTS response
  • ACK response
  • Block-ACK response on 802.11n hardware
  • Beacon generation
  • On later chips, it supports waking up the hardware when it sees various things - WoW packets, TIM bit set for itself, etc
  • Transmit and receive DMA
  • Interrupt generation
  • MIB counters - TX frame, RX frame, RX clear, cycle timers

PHY

The PHY implements the packet encoding and decoding. The MAC selects packets to send to the PHY for transmission; the PHY decodes packets from the air and sends them to the MAC for reception. (Yes, the Atheros NIC drivers do no actual packet encoding/decoding in software - the hardware does all of this. It's not a software defined radio.)
It is also responsible for watching the air and determining when the air is clear enough to transmit. The MAC has an input (RX_CLEAR) which it uses to determine whether it's able to transmit or not.
The PHY has one (or more, for later chips) ADCs and DACs which handle receiving and transmitting encoding frames to the analog section.

Analog

The Analog section links into the PHY via the ADCs and DACs. It's responsible for tuning to the relevant 2 or 5GHz frequency and converting things as needed.

Chipset specifics

AR5210

The MAC supports:
  • One RX queue
  • Two TX queues (data / beacon?)
  • 5GHz OFDM only transmit and receive
  • Open, WEP encryption
  • Station, AP, Ad-hoc configuration
The AR5210 requires an external analog chip (RF5110) which handles the 5GHz conversion.

AR5211

The AR5211 MAC supports:
  • One RX queue
  • Four(?) TX queues
  • OFDM _or_ CCK operation - it doesn't automatically switch between both
  • Open, WEP, WPA encryption schemes
  • Station, AP, Ad-hoc configuration
The AR5211 requires an external analog chip. There were two made: RF5111 for 5GHz operation and RF2111 for 2GHz operation. The driver would configure which analog chip was active.
Since the decoder can't automatically determine the difference between OFDM and CCK on received frames, the AR5211 doesn't support 802.11bg operation. It either supports 802.11b operation (CCK) or 802.11g operation (OFDM) or 802.11a operation (OFDM). This is why madwifi/net80211 supported the concept of "PUREG" - OFDM-only in 2GHz.
The AR5212 MAC supports:
  • One RX queue
  • 10 TX queues - 8 data, 1 beacon, one CAB (content-after-beacon)
  • OFDM, CCK operation - the PHY now supports "voting" on which decoder matched the received preamble and can choose between OFDM and CCK
  • Open, WEP, WPA encryption schemes
  • Station, AP, Ad-hoc configuration.
The AR5212 is the first to support automatic OFDM/CCK detection on received packets. This allows it to operate as an 802.11bg aware device (ie, OFDM and CCK on a 2GHz channel.)
The 10 TX queues allow for separate WMM parameters for each of the 8 WMM QoS levels.

AR5416 and later 802.11n NICs

(TODO)

AR7010

The AR7010 isn't a wireless device - it's a Tensilica core with a USB, Ethernet and PCIe to connect to various devices. The most popular core - AR7010 - has a USB target mode interface, a PCIe interface to connect to an Atheros wireless NIC, and onboard RAM/flash. Other options were available (Ethernet, PCIe to connect to the host.)

AR9271


The AR9271 can be viewed as an AR7010 style device with an AR9285 NIC on-die.